{
  "schema_version": "1",
  "model": {
    "id": "mlx-community/Qwen3-30B-A3B-4bit",
    "revision": "d388dead1515f5e085ef7a0431dd8fadf0886c57",
    "architecture": "qwen3_moe",
    "quantization": {
      "group_size": 64,
      "bits": 4
    },
    "n_experts": 128,
    "top_k": 8,
    "moe_layers": 48
  },
  "strata": {
    "commit": "6562877",
    "mlx_lm": "0.31.3"
  },
  "mode": "streamed",
  "measured_on": {
    "chip": "Apple M5 Max",
    "ram_gb": 137.4,
    "os": "macOS 26.5.1",
    "mlx_lm": "0.31.3"
  },
  "workload": {
    "prompt_set": "bench/mixed-v1",
    "prompt": "Explain how a CPU pipeline works.",
    "generated_tokens": 140,
    "warmup_tokens": 40,
    "decoding": "greedy"
  },
  "memory": {
    "target_ram_gb": 16.0,
    "reserve_gb": 4.0,
    "available_gb": 12.0,
    "enforced_memory_gb": null,
    "full_footprint_gb": 17.17,
    "measured_peak_gb": 12.17,
    "peak_rss_gb": 1.62,
    "swap_growth_gb": 0.0,
    "compression_events": 0,
    "expert_budget": 65,
    "working_set_gb": 9.15,
    "mode": "paged"
  },
  "throughput": {
    "tokens_per_s": 25.49,
    "p50_ms": 35.2,
    "p95_ms": 62.7,
    "ssd_reads_mb_per_tok": 45.3
  },
  "fidelity": {
    "method": "decode-mode teacher-forced, paged vs resident",
    "prompt_set": "arch_fidelity/mixed-v1",
    "budget": 8,
    "positions": 106,
    "agreement_pct": 98.113,
    "perplexity_delta_pct": -2.4058,
    "high_confidence_flips": 1,
    "max_abs_dlogit": 6.8671875,
    "mean_kl": 0.004979610443115234,
    "bit_exact": false
  },
  "honesty": {
    "device_real": false,
    "physical_constraint_validated": false,
    "measurement_type": "development-host benchmark",
    "memory_peak_scope": "load-through-generation",
    "throughput_is_optimistic": true
  },
  "sample_output": "A **CPU pipeline** is a technique used in modern processors to increase the throughput of instruction execution by breaking down the process of executing an instruction into multiple stages. This allows the CPU to work on multiple instructions at the same time, similar to an assembly line in a factory.\n\n### How a CPU Pipeline Works\n\nEach instruction in a CPU goes through several stages before it's completed. These stages are typically:\n\n1. **Instruction Fetch (IF)**  \n   - The CPU fetches the next instruction from memory (e.g., from the instruction cache).\n   - The program counter (PC) keeps t"
}